I want to develop pulse manager with 9075 cRIO and 9402.
I synchronize 4 DO which I have some logics between them. What is the resolution
i might acheive between 2 pulses - one rising and the other falling?
And what is the 10nsec response time of the 9402 means (and what's the connection to te 40MHz clock of the FPGA?)
Summary - Can anyone please arrange my mind about timing in cRIO...
Thanks,
Yakir.