Hello,
I am having an issues with digital change detection using DAQmx with an NI-9401 digital I/O module. I am setting up my data collection as follows
And then waiting for a rising edge using the following:
This used to be working perfectly fine until I physically moved my setup to a new location after which I now receive the following error every time I attempt to wait for an input change "Digital input detected a new sample clock before the previous sample was latched into onboard memory." my digital input is being generated by a 555 timer in a monostable configuration which generates a ~10ms pulse.
I looked at the output of my 555 in a scope and do notice there are about 10ns of transients before the voltage stabilizes for the 10ms pulse. This led me to think that I could simple slow down the sample clock of the DAQ device somehow so that it doesn't pick up these false logic changes. However, I cannot figure out how to accomplish this.
Does this look like it might be the issue or could there be another problem?
Thanks!