Looking through the datasheet, it isn't clear to me the tolerance of individual digital output bits that I want triggered at the same time. I inherited a piece of hardware with a latching circuit that used one DO as a clock to ensure all signals were sent simultaneously. I'm guessing that it isn't necessary with this DIO card, and was just legacy from before.
Can someone point me to which section of the datasheet pertains to my particular condition?
Additionally, I'm still trying to understand the specification requirements on what can be tolerated from the setup.