Why the pulse width and pattern gets changes for each level while converting a signal from analogue to digital using ADC VI.

Task:

i am trying to multiplex two signals using time division multiplexing, for that purpose

step 1) i took two analogue signals using simulate signal VI and displayed the same using mixed signal VI.

step 2) converted both the signals into digital using Analogue to Digital converter VI and displayed the same using mixed signal VI.

step 3) using  case structure as commutator switch to select between the signals to transfer/ display as TDM channel.

Problems :

1) in step 2 display, why the pulse width and pattern gets changes for each level while converting a signal from analogue to digital using ADC VI. the pulse width and pattern is changing by changing by changing any of the three: a) amplitude of signals, b) frequency of signals and, c) by changing the slot duration or frequency/ select time(true/ false time) of case structure i.e. commutator switch frequency.

2) unable to concatenate the data streams and view the data stream in TDM channel for two or more time slots.

Please look for the waveform and pulse pattern in screenshots.

please provide the solutions and comment your views, as I am eagerly waiting to know the reason behind this. 

i will be thankful to members for sharing there knowledge and solutions.