Basically, I am building a timing circuit that must have very low timing jitter (<<10ns ideally), and I need a way to AND two TTL signals. I could build an AND gate circuit, but was wondering about using DAQMX to do it.
Is it possible to use DIO or PFI lines to implement an AND operation without synchronizing to an internal clock? Basically, look if both are high and generate a HIGH/LOW output on a third pin without timing jitter associated with waiting for a sampling clock? I realize I could just trigger off of one signal and read the other, but if it has to wait for the next clock cycle of a free running sampling clock, the timing jitter will probably be too high.