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PCI-6503 RLP Mapping.

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Hello,

I have a PCI 6503, and I am developing a driver to run the card.  Everything, so far, is going fine.

The driver loads, I have the VID and PID for the device.  PNP finds the board and tells me all about it.  I have the doc ...  "PCI-6503 User Manual" (374938b.pdf) and was doing fine until the appendix B, page 14.

 

But now I have some concept questions.

 

The driver is enumerating the resources with memory (and an interrupt) not register ports. I was epxecting registers...

Specifically there are two memory windows,  Then the appendix starts talking about remapping memory.

 

First....  Isn't that a violation of the PCI PNP spec to redefine resource addresses?    Why would this even be an option?  It says the programmer has to keep track of what resource is being used...  so I have to go into the device manager and look at all the resources, and pick some that are not used?  Which is fine until the PNP manager reassigns some stuff.  Then the machine is dead in the water...

Next... The next page (B15) has a table of 'register' addresses.  But the PCI PNP enumeration didn't give any registers, only memory addresses.  Where do these come from?  (is it a misnomer?)

 

Then I just get even more lost...  The doc starts talking about BAR0 and BAR1.

Which of ther two memory windows is BAR0 and BAR1? Or are they not it at all?

It says to write to BAR0 + 0x10?  Which memory window is the BAR?

    (my card came up with fdfff000 and fdffe000, which oddly enough has the memory spaces backwards, not contigous)

Step 3 says write the address you want to use to config space "offset 0x14  (BAR1)".  This implies that BAR1 is BAR0 + 0x14.  But if they are those memory windows, than BAR1 is 4096 bytes away from BAR0, not a mere 20 bytes away.

How, if at all, does this translate to accessing through registers (outb...)   Or is access only ever done through memory alone?

 

Clearly, I am missing some fundemental concept here.  Up to this point, everthing had been fine.

 

(I have another simpler question on the interrupt...  it can be configured for PORT A or PORTB...  Is that only when they are configured as inputs?  And is that any specific bit in the port, or the entire 8 bit port?  Is that an 'interrupt on change' ? )

 

And advice is appreciated.

 

-Scotty


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