BASIC FPGA CLOCKING SIGNAL

HI 

I have 2 questions.

1) Can I use data port as clock signal? If yest, How do I assign/export a 60MHz generated clock to the lvds clock out signal on NI 6587 adaptor module.

Similarly if we are using an external clock as input,  is it necessary to assign **bleep** to dedicated strobe out signal? Can't data port be used as clock signal within the labview software?

2) Can we change clock edges? I am currently working on the positive edge of the clock. When I switch SMAs from  p to n and n to p, the software does not run. how do u change clock edge in labview  when using NI 7962R FPGA module and  NI 6587 adaptor module?

thanks